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L4955 5a uldo linear regulators family up to 5a output current 2% precise output voltages fast transient response 0.75v typ. drop out voltage at 5a operating input voltage from 4.5v adjustable version: ? v o = 1.26v ? inhibit (i q = 120 m a typ.) ? power good ? programmable current limit ? heptawatt package fixed version: ? 3.3v, 5.1v, 12v outputs ? versawatt package very low quiescent current short circuit protection (foldback function) thermal shutdown applications pentium ? and power pc ? supplies post regulator for smps low cost solution for 5v to 3.3v conversion low cost battery charger constant current regulator suitable for application with standby feature description the L4955 is a family of monolithic ultra very low drop linear regulators designed to supply the most recent microprocessors. the dropout voltage is only 0.75v (typ.) at 5a, di- rectly dependent on the output current conditions. realized in bcdii technology, it has on board a charge pump to properly drive an n-channel power mos transistor with 150m w of r dson . it operates from a 4.5v minimum supply, with a very low quiescent current irrespective of the load; a minimum of 22 m f output capacitor is re- quired for stability. the on-chip trimming techniques improve the pre- cision of the available output voltages to 2%. ancillary functions like power good, inhibit with march 1998 typical applications heptawatt versawatt (to-220) multipower bcd technology ordering numbers output voltage package L4955 1.26v adj heptawatt L4955v3.3 3.3v versawatt L4955v5.1 5.1v versawatt L4955v12 12v versawatt L4955 cl gnd adj out in inh pg 7 5 24 6 3 1 c1 v in r1 r2 c2 v out d97in589 L4955vxxx gnd out in 3 2 1 c1 v in c2 v out d97in590 1/15
low power consumption, programmable output voltage and current limiting make the flexible heptawatt version usable in applications where power management, stand-by, features, post regulation and adjustable current generators for battery chargers are important. versawatt absolute maximum ratings symbol parameter value unit v in supply input voltage 24 v adj and cl pins pg and inh pins -0.3 to 4 0tov in v v p tot power dissipation @ t amb =50 c power dissipation @ t case =90 c 2 15 w w t st ,t i storage temperature -40 to +150 c pin connections (top views) heptawatt 1 2 3 4 5 6 7 out pg adj gnd inh cl in d96in367 tab connected to pin 4 out gnd in 1 3 d96in369 in program. c.l. pre regulator v ref = 1.26v + - e/a out adj gnd pg cl d96in366 1(1) 3 26 4(2) 5 7(3) pin x = heptawatt pin (x) = versawatt inhibit active high 1.26v inh v in 10 m f fixed c.l. thermal shutdown foldback buffer charge pump power dmos 150m w + - v ref + - 0.9v ref r1 22 m f r2 v out r cl (1/4w, 1%) block diagram L4955 2/15
L4955 - electrical characteristics (t j =25 c, v in = 12v, unless otherwise specified). ? = specifications referred to t j from 0 c to +125 c. symbol parameter test condition min. typ. max. unit v in operating supply voltage 4.5 22 v v o output voltage (1) 0.1a < i o < 5a; 4.5v < v in <12v 1.235 1.26 1.285 v 4.5v < v in < 12v; 0.1a < i o <5a ? 1.222 1.26 1.298 v d v o line regulation (1) 4.5v < v in <22v; i o = 10ma 2 10 mv d v o load regulation (1) 0.1a < io < 5a 2 10 mv v o dropout voltage i o =5a v in 4.5v 0.75 1.1 v ? 1.1 1.5 v i o =2a ? 0.55 0.75 v i o current limiting ? 5.1 6.3 7.5 a short circuit current v o =0v ? 1.8 a programmable current limiting r lim = 13k w r lim = 47k w ? ? 2.55 0.70 3 0.85 3.45 1.00 a a i q quiescent current 0.1a < i o <5a c l =0 c l = 13k 2 2.7 3 4 ma ma stand by current inh = 5v 120 200 m a inhibit threshold rising edge ? 1.1 1.26 1.42 v inhibit hysteresis 0.2 v inhibit bias sink current inh = 5v or 0.8v 20 60 m a power good threshold rising edge 0.9 x v o v power good hysteresis ? 0.2 v power good saturation i pg = 4ma ? 0.1 0.4 v ripple rejection f = 120hz, i o =5a v in =6v d v in =2v pp 60 75 db (1) output voltage connected to adj. thermal data (heptawatt & versawatt packages) symbol parameter value unit r th j-case thermal resistance junction-case max. 2.5 c/w r th j-amb thermal resistance junction-ambient max. 50 c/w thermal shutdown typ. 150 c thermal hysteresis typ. 20 c pin functions hw vw name function 1 1 in unregulated input voltage; this pin must be bypassed with a capacitor larger than 10 m f. 2 cl a resistor connected between this pin and ground sets the programmable current limiting value. when the programmable current limiting is not used the pin must be connected to gnd. 3 inh ttl-cmos input. a logic high level on this input disables the device. an internal pull-down insures full functionally even if the pin is open. 4 2 gnd ground. 5 adj the output is connected directly to this terminal for 1.26v operation; it is connected to the output through a resistive divider for higher voltages. 6 pg open drain output, this signal is low when the output voltage is lower than 90%, otherwise is high. 7 3 out regulated output voltage. a minimum bypass capacitor of 22 m f is required to insure stability. L4955 3/15
L4955v5.1 - electrical characteristics (t j =25 c, v in = 8v, unless otherwise specified) ? = specifications referred to t j from 0 c to +125 c. symbol parameter test condition min. typ. max. unit v in operating input voltage v o +v d 22 v v o output voltage 6.75v < v in < 15v; 0.1a < i o < 5a 5.000 5.100 5.200 v 6.75v < v in < 15v; 0.1a < i o <5a ? 4.950 5.100 5.250 v v d drop-out voltage i o = 5a 0.75 1.1 v ? 1.1 1.5 v i o =2a ? 0.55 0.75 v d v o line regulation 6.5v < v in <15v; i o = 10ma 2 10 mv d v o load regulation 0.1a < io < 5a 5 20 mv i o current limiting ? 5.1 6.3 7.5 a short circuit current v o =0v ? 1.8 a i q quiescent current 0.1a < i o <5a 2 3 ma ripple rejection f = 120hz, i o =5a v in =8v d v in =2v pp 55 65 db L4955v12 - electrical characteristics (t j =25 c, v in = 15v, unless otherwise specified) ? = specifications referred to t j from 0 c to +125 c. symbol parameter test condition min. typ. max. unit v in operating input voltage v o +v d 22 v v out output voltage 15v < v in < 22v; 0.1a < i o < 5a 11.760 12.00 12.240 v 15v < v in < 22v 0.1a < i o <5a ? 11.640 12.00 13.360 v v d drop-out voltage i o = 5a 0.75 1.1 v ? 1.1 1.5 v i o =2a ? 0.55 0.75 v d v o line regulation 13.5v < v in <22v; i o = 10ma 10 40 mv d v o load regulation 0.1a < i o <5a 10 40 mv i o current limiting ? 5.1 6.3 7.5 a short circuit current v o =0v ? 1.8 a i q quiescent current 0.1a < i o <5a 2 3 ma ripple rejection f = 120hz, i o =5a v in = 15v d v in =2v pp 50 60 db L4955v3.3 - electrical characteristics (t j =25 c, v in = 5v, unless otherwise specified) ? = specifications referred to t j from 0 c to +125 c. symbol parameter test condition min. typ. max. unit v in operating input voltage 4.5 22 v v o output voltage 4.75v < v in < 12v; 0.1a < i o < 5a 3.234 3.300 3.366 v 4.75v < v in < 12v; 0.1a < i o <5a ? 3.201 3.300 3.399 v d v o line regulation 4.5v < v in <12v; i o = 10ma 2 10 mv d v o load regulation 0.1a < i o <5a 3 15 mv i o current limiting ? 5.1 6.3 7.5 a short circuit current v o =0v ? 1.8 a i q quiescent current 0.1a < i o <5a 2 3 ma ripple rejection f = 120hz, i o =5a v in =6v d v in =2v pp 57 70 db L4955 4/15
-40 0 40 80 120 160 1.24 1.245 1.25 1.255 1.26 1.265 1.27 1.275 1.28 tj [ c] vout [v] vin=12v iout=10m a figure 2: output voltage stability vs. junction temperature -40 -20 0 20 40 60 80 100 120 140 160 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 tj [ c] output voltage deviation [m v 4.5v 4.5v tj = 125 c power dissipation limit tc = 25 c pdmax = 40w current lim itation tc = 70 c pdm ax = 22w dc operating area rdson limit figure 1: L4955 dc operating area 0123456 0 0.25 0.5 0.75 1 1.25 iout [a] m in im u m v in - vo u t vo lta g e [v ] tj = 125 c tj = 25 c tj = -40 c pulsed techniq ue has been used figure 5: dropout voltage *pulsed tecnique has been used -40 -20 0 20 40 60 80 100 120 140 160 0 1 2 3 4 5 6 7 8 9 10 tj [ c] o utput current [a] (vin-vout) > 2v pin 2 = gnd figure 6: maximum outputcurrent vs. junction temperature with internal current limiting L4955 L4955 5/15
-40-20 0 20406080100120140160 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 tj [ c] iq [m a ] vin=12v iout=10m a to 5a figure 8: quiescent current vs. temperature (cl = 0v) 1k 10 100 10k 100k 0 10 20 30 40 50 60 70 80 90 100 frequency [hz] r ip p le r e je c tio n [d b ] cin = 22uf cout = 22uf vout = 1.26v vinmin = 4.5v io ut = 5 a vripple = 3vp-p vripple = 0.5vp-p figure 12: ripple rejection vs. frequency *pu lsed tecnique has been used -40 -20 0 2 0 4 0 60 80 10 0 12 0 1 40 160 0 0.5 1 1.5 2 2.5 3 3.5 tj [ c] s hort-circuit current [a] r lim = 4 7 k w r lim = 1 3 k w r lim = 1 9 k w figure 7: short-circuit current vs. junction temperature with programmable current limiting 0 5 10 15 20 25 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 vin [v] iq [m a ] io = 1 0m a to 5 a tj=25 c tj=125 c tj= - 40 c figure 9: quiescent current vs. supply voltage (cl = 0v) tj = 25 c 0 5 10 15 20 25 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 vin [v] iq [ma] rli m = 13k w rlim = 47k w figure 10: quiescent current vs. supply voltage with programmable current limiting 0 5 10 15 20 25 0 50 100 150 200 250 300 350 400 vin [v] iq [u a] tj=25 c figure 11: stand-by current vs. supply voltage with inh = logic high L4955 L4955 6/15
pg v adj 0.9 v adj hyst = 200mv high low low t t d96in364b v out =v adj (r1+r2)/r2 figure 14: power good function v inh vref = 1.26v hyst = 200mv regulator off t t regulator on regulator on d96in365a figure 15: inhibit function 012345 0 10 20 30 40 50 60 70 80 90 100 iou t [a ] r ipp le r e jec tio n [d b ] fripple=120hz vripple=3vp-p fripple=10kh z vripp le= 0.5v p-p fripple=1khz v ripp le= 0.5v p-p f ripple=5 0khz vripple=0.5v p-p c in=22uf c out=22uf vo ut=1.26v vinmin=4.5v figure 13: ripple rejection vs. output current L4955 L4955 7/15
line transient response figure 16. figure 17. figure 18. test condition :v in = 12v; d v in = 1v; v o = 3.3v; i o = 200ma; c in =10 m f (electrolytic capacitor); c out =22 m f (electrolytic capacitor); dv/dt = 0.1 v/ m s; t j =25 c L4955 8/15
load transient response figure 19. figure 20. figure 21. c1,c2 470 m f/25v panasonic hfq r4 910 r5 560 c4 to c9 100 m f/10v avx tps 6 each c10 to c15 1 m f avx x7r 6 each vout = 3.3v vin = 5v 1 2 in cl gnd 43 inh 7 out 5 adj L4955 pg 6 d97in546 figure 22: load transient test circuit. test condition: v in = 5v, v out = 3.3v; load transient from 0.5a to 5a; di out dt = 20 a M m s ;t j =25 c L4955 9/15
L4955v3.3 3 4.5 6 7.5 9 10.51213.51516.51819.52122.5 0 1 2 3 4 5 6 7 8 input voltage [v] output current [a] current limitation vout = 3.3v tj = 125 c power dissipation limit tc = 25 c pdmax=40w rdson lim it dc operating area tc=70 c pdmax=22w figure 23: dc operating area. -40 0 40 80 120 160 3.2 3.25 3.3 3.35 3.4 tj [ c] vo ut [v ] vin = 5v iout = 10ma figure 24: output voltage stability vs. junction temperature. -40 -20 0 20 40 60 80 100 120 140 160 0 0.25 0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5 2.75 3 tj[ c] iq [m a] vin=5v iout = 10ma to 5a figure 25: quiescent current vs. temperature. 012345 -5 -4 -3 -2 -1 0 1 2 3 4 5 iout [a] output voltage deviation [mv] vin=5v tj = 25 c (pulsed tecnique has been used) figure 26: load regulation -40 -20 0 20 40 60 80 100 120 140 160 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 tj [ c] output voltage deviation [mv] 4.5v 2v pin 2 = gnd figure 28: maximum output current vs. junction temperature with internal current limiting L4955 10/15
L4955v5.1 0 2.5 5 7.5 10 12.5 15 17.5 0 1 2 3 4 5 6 7 8 (v in - vou t) [v ] o utput curre nt [a ] c u rre nt l im itatio n vout = 5.1v tj = 125 c pow er d iss ip a ti o n lim it rd son limit dc o pe ratin g a re a tc = 25 c pdmax = 40w tc = 70 c pdmax = 22w figure 29: dc operating area. -40 0 40 80 120 160 4.9 4.95 5 5.05 5.1 5.15 5.2 tj [ c] vout [v] vin = 8v iout = 10ma figure 30: output voltage stability vs. junction temperature. -40 -20 0 20 40 60 80 100 120 140 160 0 0.25 0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5 2.75 3 tj [ c] iq [ma] vin = 8v iout = 10ma to 5a figure 31: quiescent current vs. temperature. 012345 -10 -8 -6 -4 -2 0 2 4 6 8 10 io u t [a] output voltage deviation [mv] vin = 8v tj = 25 c (p ulsed tecnique has been used) figure 32: load regulation -40 -20 0 20 40 60 80 100 120 140 160 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 tj [ c] output voltage deviation [mv] 6.5v < vin < 15v iout = 10ma figure 33: line regulation vs. junction tempera- ture. *pulsed tecnique has been used -40 -20 0 20 40 60 80 100 120 140 160 0 1 2 3 4 5 6 7 8 9 10 tj [ c] o utput current [a] (vin-vout) > 2v pin 2 = gnd figure 34: maximum outputcurrent vs. junction temperature with internal current limiting L4955 11/15
L4955v12 0 2.5 5 7.5 10 12.5 0 1 2 3 4 5 6 7 8 (vin - vout) [v] o utput curre nt [a] dc operating area current limitation tc = 25 c pdm ax = 40 w rdson limit tc = 70 c pdmax = 22 w pow e r d is s ip a tio n l im it vout = 12v tj = 1 25 c figure 35: dc operating area. -40 0 40 80 120 160 11.75 11.875 12 12.125 12.25 tj [ c] vo ut [v ] vin = 15v iout = 10ma figure 36: output voltage stability vs. junction temperature. 012345 -20 -15 -10 -5 0 5 10 15 20 iout [a] output voltage deviation [mv] vin = 15v tj = 25 c (pulsed tecnique has been used) figure 37: load regulation -40-20 0 20406080100120140160 0 2 4 6 8 10 12 14 16 18 20 tj [ c] output voltage deviation [mv] 13.5v < vin < 22v iout = 10ma figure 38: line regulation vs. junction tempera- ture. -40 -20 0 20 40 60 80 100 120 140 160 0 0.25 0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5 2.75 3 tj[ c] iq [m a] vin = 15v iout = 10ma to 5a figure 39: quiescent current vs. temperature. *pulsed tecnique has been used -40 -20 0 20 40 60 80 100 120 140 160 0 1 2 3 4 5 6 7 8 9 10 tj [ c] o utput current [a] (vin-vout) > 2v pin 2 = gnd figure 40: maximum outputcurrent vs. junction temperature with internal current limiting L4955 12/15
heptawatt package mechanical data dim. mm inch min. typ. max. min. typ. max. a 4.8 0.189 c 1.37 0.054 d 2.4 2.8 0.094 0.110 d1 1.2 1.35 0.047 0.053 e 0.35 0.55 0.014 0.022 f 0.6 0.8 0.024 0.031 f1 0.9 0.035 g 2.41 2.54 2.67 0.095 0.100 0.105 g1 4.91 5.08 5.21 0.193 0.200 0.205 g2 7.49 7.62 7.8 0.295 0.300 0.307 h2 10.4 0.409 h3 10.05 10.4 0.396 0.409 l 16.97 0.668 l1 14.92 0.587 l2 21.54 0.848 l3 22.62 0.891 l5 2.6 3 0.102 0.118 l6 15.1 15.8 0.594 0.622 l7 6 6.6 0.236 0.260 m 2.8 0.110 m1 5.08 0.200 dia 3.65 3.85 0.144 0.152 L4955 13/15
versawatt package mechanical data dim. mm inch min. typ. max. min. typ. max. a 4.8 0.189 c 1.37 0.054 d 2.4 2.8 0.094 0.110 d1 1.2 1.35 0.047 0.053 e 0.35 0.55 0.014 0.022 f 0.8 1.05 0.031 0.041 f2 1.15 1.4 0.045 0.055 g 4.95 5.08 5.21 0.195 0.200 0.205 h2 10.4 0.409 h3 10.05 10.4 0.396 0.409 l2 16.2 0.638 l3 26.3 26.7 27.1 1.035 1.051 1.067 l5 2.6 3 0.102 0.118 l6 15.1 15.8 0.594 0.622 l7 6 6.6 0.236 0.260 dia 3.65 3.85 0.144 0.152 a c d1 d h3 e l6 l7 l2 l3 l5 dia. h2 f2 f g to220mec L4955 14/15
information furnished is believed to be accurate and reliable. however, sgs-thomson microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of sgs-thomson microelectronics. specification mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. sgs- thomson microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of sgs-thomson microelectronics. ? 1998 sgs-thomson microelectronics printed in italy all rights reserved sgs-thomson microelectronics group of companies australia - brazil - canada - china - france - germany - italy - japan - korea - malaysia - malta - morocco - the netherlands - singapore - spain - sweden - switzerland - taiwan - thailand - united kingdom - u.s.a. L4955 15/15

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